Dr. Mohamed Asan Basiri M, Indian Institute of Information Technology Design and Manufacturing Kurnool, India.
Dr. Mohamed Asan Basiri M is an Assistant Professor (Grade I) at IIITDM Kurnool, specializing in VLSI architectures, FPGA design, and hardware accelerators ⚙️💡. With a Ph.D. from IIITDM Kancheepuram, he has led multiple government-funded research projects and published extensively in IEEE conferences and Q1 journals 📚🔬. His work bridges high-performance computing and secure system design, making significant strides in embedded systems and digital communication 🧠🚀.
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🎓 Early Academic Pursuits
Dr. Mohamed Asan Basiri M laid a solid academic foundation in Electronics and Communication Engineering with a B.E. degree (81.2%) from Thanthai Periyar Government Institute of Technology, Vellore, followed by a M.E. in Embedded System Technologies (9.1 CGPA) from Anna University, Coimbatore. He advanced into high-impact research with a Ph.D. in High Performance VLSI Architectures for Discrete Transformations from IIITDM Kancheepuram, Chennai. His academic path showcases a blend of electronics, embedded systems, and computational hardware design. 🧑🎓
💼 Professional Endeavors
Dr. Basiri’s professional journey includes roles of increasing responsibility and expertise. He currently serves as an Assistant Professor (Grade I) at IIITDM Kurnool since August 2020. His earlier roles at IIT Kanpur include Senior Project Engineer, Postdoctoral Fellow, and Research Associate, showcasing his early immersion in cutting-edge research. These experiences have contributed to a robust academic and research-oriented career. 🏢
🔬 Contributions and Research Focus On Signal Processing
Dr. Basiri’s research spans VLSI architectures, hardware accelerators, signal processing, cryptography, and AI hardware systems. His work notably emphasizes instruction-data level parallelism, FPGA implementations, convolutional neural networks, and secure communication systems. With over 30+ IEEE and Springer Q1 international conference papers and multiple SCI journal publications, his contributions are extensive and deeply technical. 📈
🌍 Impact and Influence
His designs have relevance in High-Performance Computing (HPC), Cyber-Physical Systems (CPS), cryptographic systems, and machine learning accelerators. His hardware-based optimizations and architectural innovations have helped reduce latency, enhance throughput, and ensure secure digital communication, influencing both academic research and practical implementations in embedded VLSI design. 🌍
🧠 Research Skills
He is highly skilled in hardware-software co-design, FPGA-based system modeling, adaptive and reconfigurable architectures, ASIC prototyping, RTL design, and formal verification methods. Additionally, his ability to translate complex computational theories into high-speed VLSI hardware implementations positions him as a domain expert in computational electronics. 🔧
🏅 Awards and Honors
Dr. Basiri has earned recognition for his funded projects from premier institutions such as MeitY, SERB, and C3IHub (IIT Kanpur). His selection for multiple invited talks, including one at IIMT University, Meerut in 2024 on AI-driven hardware, reflects his reputation as a thought leader in his domain. 🎖️
🏛️ Legacy and Future Contributions
Through ongoing projects such as the C2S-funded hardware accelerator for HPC (Rs. 79.89 Lakhs) and a secured digital communication system (Rs. 17.44 Lakhs), Dr. Basiri continues to shape the future of intelligent, real-time, and secure embedded systems. His legacy lies in combining academic depth with real-world relevance, creating a platform for emerging researchers and engineers. 🔮
Publications Top Notes
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📗 An Efficient Hardware-Based Higher Radix Floating Point MAC Design
📌 Journal: ACM Transactions on Design Automation of Electronic Systems (TODAES)
🔢 Citations: 26
📅 Year: 2014
🧮 Topic: Floating point MAC design in hardware
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📘 Hardware Optimizations for Crypto Implementations
📌 Conference: 20th International Symposium on VLSI Design and Test (VDAT)
🔢 Citations: 15
📅 Year: 2016
🔐 Topic: Hardware-level crypto efficiency
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📘 Multiplication Acceleration Through Quarter Precision Wallace Tree Multiplier
📌 Conference: International Conference on Signal Processing and Integrated Networks (SPIN)
🔢 Citations: 14
📅 Year: 2014
✴️ Topic: Efficient multiplier design
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📗 An Efficient Hardware-Based MAC Design in Digital Filters with Complex Numbers
📌 Conference: SPIN
🔢 Citations: 12
📅 Year: 2014
🎚️ Topic: Complex digital filter architecture
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📘 An Efficient VLSI Architecture for Discrete Hadamard Transform
📌 Conference: 29th International Conference on VLSI Design
🔢 Citations: 8
📅 Year: 2016
🧠 Topic: Transform-based VLSI system